二手 数据通信和误码率测试
二手设备网目前只有英文版本,美国的定价以美元计。其他国家的价格会有所不同。
通过测量误码率、对抗符号间干扰来评估信号质量,同时确保最佳的数据流。
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1周内运抵United States 90天保修 不包括
Keysight DAQ973A 用户手册
- 3-slot mainframe with USB, LAN and GPIB interfaces
- 6 1/2-digit (22-bit) internal DMM, scanning up to 450 channels per second with new solid-state multiplexer module
- 9 switch and control plug-in modules to choose from
- 24-bit sampling rate of 800 kSa/s with a new DAQM909A 4 channel digitizer module
- Built-in signal conditioning measures thermocouples, RTDs and thermistors, AC/DC volts and current; resistance, frequency/period, diode test and capacitance
- 100k readings of non-volatile memory holds data when power is removed
- Hi/LO alarm limits on each channel, plus 4 TTL alarm outputs
Get the next-generation data acquisition (DAQ) system with a 3-slot mainframe and your choice of 9 plug-in modules. Interface with the DAQ using Keysight BenchVue DAQ software, the intuitive graphical front panel with task oriented, self-guiding menus, or a web browser.
- Advanced 6½ digit internal DMM with improved accuracy and faster measurement speed
- Ability to measure very low current ranges (1 μA DC and 100 μA AC) and higher resistance range (1000 M?)
- New auto-calibration that compensates for internal drifts caused by time and temperature changes
- 3497XA compatible, program and configuration
Keysight’s BenchVue DAQ Control and Analysis app is available for use with the DAQ970A, DAQ973A, 34970A, 34972A and 34980A. BenchVue gives you an intuitive interface for test configuration and real-time data display and analysis. Setup and make measurements quickly, export data or log and view real-time measurements with a variety of display types to interpret your data faster. BenchVue Software also supports many other Keysight instruments giving you a single interface for Keysight’s most popular instruments.
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
8周内运抵United States KeysightCare Keysight M8046A 数据表
Keysight M8046A 用户手册
A64 | Analyzer, one Channel, Data Rate up to 64 GBaud, NRZ |
- Symbol rates 2 to 32.4 Gbaud
- One channel per 1-slot module
- 70 mV input sensitivity
- Supports NRZ and PAM4
- Built-in equalization
- Real-time bit error and symbol error analysis
Simplified, time-efficient testing is essential when you are developing next-generation computer, consumer, or communication devices. The Keysight M8000 Series is a highly integrated bit error ratio (BER) test solution for physical layer characterization, validation, and compliance testing. With support for a wide range of data rates and standards, the M8000 Series provides accurate, reliable results that accelerate your insight into the performance margins of high-speed digital devices.
The M8046A is an instrument module that can be installed into the M9505A 5- slot AXIe chassis. This module occupies one slot. The M8046A supports symbol rates up to 32.4 Gbaud, the default is NRZ format. The analyzer module can be used for error analysis in conjunction with the M8045A pattern generator, the M8195A/M8196A Arbitrary Waveform generators or as stand-alone. With M8070A software version 5.0, the M8046A can also be used in conjunction with M8041A + M8062A.
0A3 | Equalizer License |
0A4 | Clock Recovery for 32 Gbaud, License |
0A5 | Clock Recovery Extension up to 64 Gbaud, License |
0N1 | PCIe LTSSM for 64 GT/s, requires M8046A-0S1/US1 |
0N2 | PCIe Filtering of SKP OS Extension for 64 GT/s, requires M8046A-0S2 or M8046A-US2 |
0P3 | PAM-4 Decoding up to 32 GBaud |
0P6 | PAM-4 Extension up to 58 Gbaud, License |
0S1 | Interactive Link Training for PCIe 8/16/32 GT/s, License |
0S2 | SKP OS Filtering for PCIe 8/16/32 GT/s and CCIX 20/25 Gb/s, License |
0S3 | Interactive Link Training for USB 3.2, 5G and 10G, x1 and x2, License |
0S4 | SKP OS Filtering for USB 3.0, 3.1, 3.2, License |
0S6 | ALIGN Filtering for SATA 3G/6G and SAS 3G/6G/12G, License |
801 | Cable, 2.92 mm (m) to 2.92 mm (m), Length 0.5 m |
801 | Cable, 2.92 mm (m) to 2.92 mm (m), Length 0.5 m |
802 | Matched Cable Pair, 2.4 mm, 2 ps, Length 0.85 m |
803 | Matched Cable Pair, 2.4 mm to MMPX, 2 ps match, 40 GHz, Length 914 mm |
804 | Matched Cable Pair, 2.4 mm to 2.92 mm, 2 ps match, 40 GHz, Length 914 mm |
A32 | Analyzer, one Channel, Data Rate up to 32 GBaud, NRZ |
A64 | Analyzer, one Channel, Data Rate up to 64 GBaud, NRZ |
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
- Remote Head for M8045A Pattern Generator
- 1 Channel
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
8周内运抵United States KeysightCare Keysight M8059A 用户手册
The M8058A/M8059A remote head includes an external amplifier that is used in combination with the M8042A Pattern Generator. It helps in minimizing signal degradations caused by lossy channels.
The 120 GBd M8059A remote head provides
1.0 mm connectors and is used to accommodate close connection to the device under test for symbol rates up to 120 GBd.
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
4周内运抵United States KeysightCare Keysight M8062A-C32 数据表
C32 | 32 Gb/s BERT Front End |
- Expands data rate of J-BERT M8020A up to 32.4 Gb/s
- Fully unique integrated capabilities for higher-data-rate testing
- Integrated adjustable inter symbol interference (ISI) helps engineers quickly test over a large range of channel loss without moving cables
- Integrated analyzer equalization ensures accurate BER measurements by opening eyes in the looped-back channel
- Integrated 8-tap de-emphasis allows engineers to emulate transmitter operation and de-embed test setups
- Improved efficiency and accuracy for 100G and beyond testing
- Interactive TxEQ training for 25GBASE-KR and 100GBASE-KR4
- Control from J-BERT M8020A high-performance BERT
The M8062A 32 Gb/s module expands the J-BERT M8020A high-performance BERT with versatile generator and analyzer functionality at data rates up to 32.4 Gb/s. The newly integrated capabilities streamline testing for R&D and test engineers who need to characterize devices and systems for next-generation data-center and long-haul-communication applications. Fully integrated capabilities like inter symbol interference generation, clock data recovery and analyzer equalization greatly improve device characterization and compliance testing and significantly simplifies test setups. The M8062A is a 2-slot AXIe module that can be controlled via USB through the integrated user interface of the J-BERT M8020A or through remote programming commands to allow test automation.
Application examples for M8062A:
- Optical transceivers such as 100GBASE-LR4, -SR4 and -ER4, 32G Fibre Channel
- SERDES and chip-to-chip interfaces, such as OIF CEI
- Backplanes, cables, such as 100GBASE-KR4, -CR4
- SAS-4 receiver testing
- Thunderbolt 20G and active optical cables
0A3 | Analyzer Equalization License |
0A4 | Clock Recovery License |
0G4 | Multi-tap De-emphasis License |
0G5 | Adjustable Intersymbol Interference (ISI) License |
0SC | 100GBASE-KR4 and 25GBASE-KR Transmitter Equalization Training, Module-wide License |
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
4周内运抵United States KeysightCare Keysight M8062A-G32 数据表
G32 | 32Gb/s Pattern Generator Front End |
- Expands data rate of J-BERT M8020A up to 32.4 Gb/s
- Fully unique integrated capabilities for higher-data-rate testing
- Integrated adjustable inter symbol interference (ISI) helps engineers quickly test over a large range of channel loss without moving cables
- Integrated analyzer equalization ensures accurate BER measurements by opening eyes in the looped-back channel
- Integrated 8-tap de-emphasis allows engineers to emulate transmitter operation and de-embed test setups
- Improved efficiency and accuracy for 100G and beyond testing
- Interactive TxEQ training for 25GBASE-KR and 100GBASE-KR4
- Control from J-BERT M8020A high-performance BERT
The M8062A 32 Gb/s module expands the J-BERT M8020A high-performance BERT with versatile generator and analyzer functionality at data rates up to 32.4 Gb/s. The newly integrated capabilities streamline testing for R&D and test engineers who need to characterize devices and systems for next-generation data-center and long-haul-communication applications. Fully integrated capabilities like inter symbol interference generation, clock data recovery and analyzer equalization greatly improve device characterization and compliance testing and significantly simplifies test setups. The M8062A is a 2-slot AXIe module that can be controlled via USB through the integrated user interface of the J-BERT M8020A or through remote programming commands to allow test automation.
Application examples for M8062A:
- Optical transceivers such as 100GBASE-LR4, -SR4 and -ER4, 32G Fibre Channel
- SERDES and chip-to-chip interfaces, such as OIF CEI
- Backplanes, cables, such as 100GBASE-KR4, -CR4
- SAS-4 receiver testing
- Thunderbolt 20G and active optical cables
0A3 | Analyzer Equalization License |
0A4 | Clock Recovery License |
0G4 | Multi-tap De-emphasis License |
0G5 | Adjustable Intersymbol Interference (ISI) License |
0SC | 100GBASE-KR4 and 25GBASE-KR Transmitter Equalization Training, Module-wide License |
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
Keysight N4903B-C13 用户手册
C13 | PATTERN GENERATOR AND ERROR DETECTOR 150 MB/S TO 12.5 GB/S . INCLUDES BUILT-IN CLOCK DATA RECOVERY |
002 | PATTERN AND PRBS ON AUX DATA OUTPUT |
CTR | |
D14 | EXTENDED PATTERN GENERATOR DATA RATE TO 14.2 GB/S |
J10 | JITTER INJECTION: BUILT-IN AND CALIBRATED PERIODIC JITTER, SINUSOIDAL JITTER, RANDOM JITTER, BOUNDED UNCORRELATED JITTER |
- Data rates 150 Mb/s to 7 Gb/s or to 12.5 Gb/s pattern generator and error detector. Option to extended data rate to 14.2 Gb/s for pattern generator.
- >0.5 UI calibrated, compliant and integrated jitter injection: RJ, RJ-LF, RJ-HF, PJ1, PJ2, SJ, BUJ, ISI, sinusoidal interference, triangular and arbitrary SSC and residual SSC
- Excellent signal performance and sensitivity
- Built-in clock data recovery with tunable and compliant loop bandwidth
- Half-rate clocking with variable duty cycle for forwarded clocked devices
- Measures BER, BERT Scan, TJ with RJ/DJ separation, eye diagram, eye mask, BER contour, automated jitter tolerance, pattern capture, frame error rate (FER), or symbol error rate (SER) coded and retimed data streams
- Two adjustable data outputs with independent PRBS and pattern with 120 block pattern sequencer
- All options are retrofittable and upgrade from N4903A possible
The J-BERT N4903B high-performance serial BERT provides the most complete jitter tolerance test for embedded and forward clocked devices.
It is the ideal choice for R&D and validation teams characterizing and stressing chips and transceiver modules that have serial I/O ports up to 7 Gb/s, 12.5Gb/s or 14.2 Gb/s. It can characterize a receiver’s jitter tolerance and is designed to prove compliance to today’s most popular serial bus standards, such as:
- PCI Express®
- SATA/SAS
- DisplayPort
- USB SuperSpeed
- Fibre Channel
- QPI
- Memory buses, such as fully buffered DIMM2
- Backplanes, such as CEI
- 10 GbE/ XAUI
- XFP/XFI, SFP+
Accurate characterization is achieved with clean signals from the pattern generator, which features exceptionally low jitter and extremely fast transition times. Built-in and calibrated jitter source allow accurate jitter tolerance testing of receivers.
Test set-up is simplified significantly, because the J-BERT N4903B is designed to match serial bus standards optimally with its differential I/Os, variable voltage levels on most outputs, built-in jitter and ISI, pattern sequencer, reference clock outputs, tunable CDR, pattern capture and bit recovery mode to analyze clock-less and non-deterministic patterns.SER/FER analysis allows jitter tolerance testing of devices using retimed loopback. A second data output with independent pattern memory and PRBS can be used as aggressor channel for crosstalk tests, or when adding channels externally for OOB timing tests or emulation of 3-level signals or signal de-emphasis.
Faster test execution is possible with J-BERT’s automated jitter tolerance tests fast total jitter measurements.
The J-BERT N4903B is a long-term investment which is configurable for today’s test and budget requirements but also allows upgrades from the N4903A model, and later retrofit of all options and full speed when test needs change.
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
Keysight N4903B-C13 用户手册
C13 | PATTERN GENERATOR AND ERROR DETECTOR 150 MB/S TO 12.5 GB/S . INCLUDES BUILT-IN CLOCK DATA RECOVERY |
002 | PATTERN AND PRBS ON AUX DATA OUTPUT |
A01 | BIT RECOVERY MODE |
A02 | SYMBOL ERROR RATIO AND FRAME ERROR RATIO (SER/FER) ANALYSIS |
D14 | EXTENDED PATTERN GENERATOR DATA RATE TO 14.2 GB/S |
J10 | JITTER INJECTION: BUILT-IN AND CALIBRATED PERIODIC JITTER, SINUSOIDAL JITTER, RANDOM JITTER, BOUNDED UNCORRELATED JITTER |
J11 | SPREAD SPECTRUM CLOCKING (SSC) |
J12 | AUTOMATED JITTER TOLERANCE COMPLIANCE SUITE |
J20 | INTERFERENCE CHANNEL: INTERSYMBOL INTERFERENCE AND SINUSOIDAL INTERFERENCE |
- Data rates 150 Mb/s to 7 Gb/s or to 12.5 Gb/s pattern generator and error detector. Option to extended data rate to 14.2 Gb/s for pattern generator.
- >0.5 UI calibrated, compliant and integrated jitter injection: RJ, RJ-LF, RJ-HF, PJ1, PJ2, SJ, BUJ, ISI, sinusoidal interference, triangular and arbitrary SSC and residual SSC
- Excellent signal performance and sensitivity
- Built-in clock data recovery with tunable and compliant loop bandwidth
- Half-rate clocking with variable duty cycle for forwarded clocked devices
- Measures BER, BERT Scan, TJ with RJ/DJ separation, eye diagram, eye mask, BER contour, automated jitter tolerance, pattern capture, frame error rate (FER), or symbol error rate (SER) coded and retimed data streams
- Two adjustable data outputs with independent PRBS and pattern with 120 block pattern sequencer
- All options are retrofittable and upgrade from N4903A possible
The J-BERT N4903B high-performance serial BERT provides the most complete jitter tolerance test for embedded and forward clocked devices.
It is the ideal choice for R&D and validation teams characterizing and stressing chips and transceiver modules that have serial I/O ports up to 7 Gb/s, 12.5Gb/s or 14.2 Gb/s. It can characterize a receiver’s jitter tolerance and is designed to prove compliance to today’s most popular serial bus standards, such as:
- PCI Express®
- SATA/SAS
- DisplayPort
- USB SuperSpeed
- Fibre Channel
- QPI
- Memory buses, such as fully buffered DIMM2
- Backplanes, such as CEI
- 10 GbE/ XAUI
- XFP/XFI, SFP+
Accurate characterization is achieved with clean signals from the pattern generator, which features exceptionally low jitter and extremely fast transition times. Built-in and calibrated jitter source allow accurate jitter tolerance testing of receivers.
Test set-up is simplified significantly, because the J-BERT N4903B is designed to match serial bus standards optimally with its differential I/Os, variable voltage levels on most outputs, built-in jitter and ISI, pattern sequencer, reference clock outputs, tunable CDR, pattern capture and bit recovery mode to analyze clock-less and non-deterministic patterns.SER/FER analysis allows jitter tolerance testing of devices using retimed loopback. A second data output with independent pattern memory and PRBS can be used as aggressor channel for crosstalk tests, or when adding channels externally for OOB timing tests or emulation of 3-level signals or signal de-emphasis.
Faster test execution is possible with J-BERT’s automated jitter tolerance tests fast total jitter measurements.
The J-BERT N4903B is a long-term investment which is configurable for today’s test and budget requirements but also allows upgrades from the N4903A model, and later retrofit of all options and full speed when test needs change.
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
Keysight N4916B 用户手册
001 | CLOCK DOUBLER |
STD | DE-EMPHASIS SIGNAL CONVERTER |
- Adjustable de-emphasis for one pre- and 2 post-cursors of 0 to 12 dB
- Supports data rates from 660 Mb/s to 14.2 Gb/s
- Tolerates non-balanced patterns
- Transparent to jitter
- Flexible usage as front-end for J-BERT N4903B, ParBERT 81250A or other pattern generators
- Optional Clock Multiplier(opt. 001)
- Small size
- Programmable via J-BERT N4903B or stand-alone
Why is signal de-emphasis needed?
The de-emphasis technique is used in the transmission of digital electrical signals at gigabit data rates. De-emphasis is a signal pre-distortion to compensate for signal degradations that occur when transmitting electrical signals with gigabit rates over PC board traces, backplanes, or long cables. With the next generation of serial bus standards operating above 5 Gb/s, sophisticated de-emphasis with multi-tap Finite Impulse Response (FIR) filtering will be needed.
Many popular high-speed digital interfaces use de-emphasis, such as PCI Express®, SATA, USB3, QPI, IEEE 802.3 backplanes (10GBASE-KR, 40GBASE-KR4).
What does the N4916B offer?
The new N4916B de-emphasis signal converter enables R&D and test engineers to accurately emulate transmitter de-emphasis.
The N4916B can emulate transmitter de-emphasis with one pre- and two post-cursors and individually adjustable de-emphasis levels of up to 12.0 dB. With its DC-coupling it tolerates unbalanced pattern streams that often occur in training sequences. The N4916B is designed to be transparent to jitter when stimulated with jitter on data and clock signal, enabling emulation of real-world de-emphasis and jitter conditions that a receiver is expected to tolerate. De-emphasis can also be used to compensate for distortions caused by cables, fixtures or test boards in the test set for more precise device characterization results.
The new De-emphasis Signal Converter can be used as front-end for J-BERT N4903B, ParBERT or other gigabit pattern generators. It is controlled via its USB interface from the J-BERT N4903B user interface or from a stand-alone user interface with programming examples.
What does the the clock multiplying option of N4916B offer?
The clock multiplier option enables error counting and error analysis of devices using half-rate clocking. The full-rate clock is needed to use the error, eye or jitter analysis capabilities of J-BERT N4903B.
What are the key differences to N4916A?
- 3 adjustable cursors (N4916A has one post-cursor, sufficient for data rates < 5 Gb/s)
- Optional clock multiplier
- Stand-alone user interface
- Maximum data rate
- Aligned data and clock input signals are required with N4916B for full jitter transparency
- Size
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
Keysight N4955A-D12 用户手册
D12 | 12.5GB/S PATTERN GENERATOR REMOTE HEAD WITH 4-TAP DE-EMPHASIS |
Features
- 1 to 12.5 Gb/s Pattern Generator remote head
- Integrated two-tap or four-tap de-emphasis signal conditioning
- Programmable generator output parameters
- Transparent jitter pass-through
- Remote head allows placement of signal very close to DUT
Compatibility
- N4965A Multi-Channel BERT 12.5 Gb/s
The N4955A is an affordable and compact pattern generator remote head available in two-tap and four-tap de-emphasis configurations. Compatible with the N4965A Serial BERT controller, it is an ideal solution to test up to 12.5 Gb/s per channel for characterizing multi-lane serial data channels. The N4955A pattern generator supports PRBS, clock, and DC logic patterns and operates up to 12.5 Gb/s with differential of single-ended connections. The remote head allows the test equipment to be located very close to the device under test, eliminating the need for long cables that degrade signal quality.
Applications:
- Serial data receiver characterization up to 12.5 Gb/s
- Multi-lane device characterization
- Crosstalk characterization
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
Keysight N4962A 用户手册
The Keysight N4962A is a cost-effective 10G BERT, consisting of an internal clock system, PRBS generator, and error detector. It is designed for automated production-line testing, manufacturing, and characterization. The N4962A instrument features highly integrated custom ASICs, which lower part count and operating temperature, resulting in high reliability. The N4962A is also compact with a simple interface, making it ideal for use on a production test bench.
Features
- Internal clock synthesizer for 9.90 to 11.35 Gb/s operation
- 0.5 to 12.5 Gb/s operation with external clock
- Multiple clock and pattern triggers
- Programmable output amplitude control
- Selectable PRBS pattern length, mark-space density
- Local push-button and GPIB remote interface
Applications
- 10G and lower rate optical transceiver production test
- Communication component incoming inspection
- General 10G device characterization
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
1周内运抵United States 90天保修 不包括
Keysight N4968A 用户手册
Features
- Operation from 3.5 to 44 Gb/s
- Demux-by-2 or demux-by-4
- Integrated phase shifter for high-speed clock and data alignment
- Differential or single-ended input
- Adjustable sub-rate clock output
The Keysight Technologies N4968A clock and data demultiplexer 44 Gb/s is a small high-performance 3.5 to 44 Gb/s clock and data demultiplexer, designed to simplify the process of making high-bitrate BER measurements at half- or quarter-rate speeds. The N4968A clock and data demultiplexer 44 Gb/s is capable of operating in demux-by-2 (17 to 8.5 Gb/s) or demux-by-4 (38 to 9.5 Gb/s) modes, with an adjustable sub-rate clock output for triggering BER testers, oscilloscopes, logic analyzers, or other instruments.
Applications
- OC-768/STM-256
- 100G Ethernet (4 x 25.78 Gb/s)
- High bit rate research
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
请查询运抵United States的时间 KeysightCare Keysight S9101A-BK1 数据表
Keysight S9101A-BK1 配置指南
BK1 | TR1 with Blocker signal capability |
D24 |
Applications: High-volume test of 5G NR network equipment and radio components
- 5G NR base station transceiver systems
- 5G NR components, including remote radio heads (RRH), distributed units (DU), active antenna arrays, amplifiers, chipsets
Benefits
- Lower Cost of Test with reduced footprint vs. benchtop instruments and extremely high test-throughput (“cloud ready”)
- OTA readiness saves space and cost with single bi-directional remote heads, with in-head switching for 2 polarizations, across all 24.25 to 43.5 GHz bands, delivering best Power and EVM at chamber
- Manufacturing Effectiveness: 1.2 GHz BW, Tx/Rx with low EVM and ACLR, operates as single instrument (includes: switching, heads, API, measurements), easy automation with calibrated system accuracy that reduces rework and false verdicts
Functionality
- Wideband signal generation and analysis of 5G NR (3GPP Release 15 and higher) waveforms in both: FR1 (380 MHz to 6 GHz) and FR2 (24.25 to 43.5 GHz)
- Features “OTA-friendly” expandable architecture: avoids high losses from switching and long cable runs, supports one or two remote mmWave heads and polarizations, and multiple Tx/Rx channels
Measurement applications and software
- The S9101A system includes Keysight N90E1S91A 5G Multi-Band Vector Transceiver Application (X-Series Application).
- Additional recommended software: N7631C Signal Studio Pro for 5G NR, N7630C for pre-5G, N7608C for custom IQ and OFDM, 89600 VSA software, and KS8400A Test Automation Platform
12M | |
24M | |
36M | |
60M | |
HD1 | Half-Duplex Port RF Transceiver One |
HD2 | Half-Duplex Port RF Transceiver Two |
N9085EM0E | 5G NR Measurement Application |
Y9085EM0E | 5G NR Non-Signaling Waveform and Measurement Application |
MMO | Timing Synchronization for MIMO |
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
请查询运抵United States的时间 KeysightCare Keysight S9101A-TR1 数据表
Keysight S9101A-TR1 配置指南
TR1 | One RF and mmWave Transceiver Channel |
D24 |
Applications: High-volume test of 5G NR network equipment and radio components
- 5G NR base station transceiver systems
- 5G NR components, including remote radio heads (RRH), distributed units (DU), active antenna arrays, amplifiers, chipsets
Benefits
- Lower Cost of Test with reduced footprint vs. benchtop instruments and extremely high test-throughput (“cloud ready”)
- OTA readiness saves space and cost with single bi-directional remote heads, with in-head switching for 2 polarizations, across all 24.25 to 43.5 GHz bands, delivering best Power and EVM at chamber
- Manufacturing Effectiveness: 1.2 GHz BW, Tx/Rx with low EVM and ACLR, operates as single instrument (includes: switching, heads, API, measurements), easy automation with calibrated system accuracy that reduces rework and false verdicts
Functionality
- Wideband signal generation and analysis of 5G NR (3GPP Release 15 and higher) waveforms in both: FR1 (380 MHz to 6 GHz) and FR2 (24.25 to 43.5 GHz)
- Features “OTA-friendly” expandable architecture: avoids high losses from switching and long cable runs, supports one or two remote mmWave heads and polarizations, and multiple Tx/Rx channels
Measurement applications and software
- The S9101A system includes Keysight N90E1S91A 5G Multi-Band Vector Transceiver Application (X-Series Application).
- Additional recommended software: N7631C Signal Studio Pro for 5G NR, N7630C for pre-5G, N7608C for custom IQ and OFDM, 89600 VSA software, and KS8400A Test Automation Platform
12M | |
24M | |
36M | |
60M | |
HD1 | Half-Duplex Port RF Transceiver One |
HD2 | Half-Duplex Port RF Transceiver Two |
N9085EM0E | 5G NR Measurement Application |
Y9085EM0E | 5G NR Non-Signaling Waveform and Measurement Application |
MMO | Timing Synchronization for MIMO |
Adding options and accessories may impact shipping times
要求提供该型号的定制版本,方法是申请一个 定制报价
请查询运抵United States的时间 KeysightCare Keysight S9101A-TR1 数据表
Keysight S9101A-TR1 配置指南
TR1 | One RF and mmWave Transceiver Channel |
Applications: High-volume test of 5G NR network equipment and radio components
- 5G NR base station transceiver systems
- 5G NR components, including remote radio heads (RRH), distributed units (DU), active antenna arrays, amplifiers, chipsets
Benefits
- Lower Cost of Test with reduced footprint vs. benchtop instruments and extremely high test-throughput (“cloud ready”)
- OTA readiness saves space and cost with single bi-directional remote heads, with in-head switching for 2 polarizations, across all 24.25 to 43.5 GHz bands, delivering best Power and EVM at chamber
- Manufacturing Effectiveness: 1.2 GHz BW, Tx/Rx with low EVM and ACLR, operates as single instrument (includes: switching, heads, API, measurements), easy automation with calibrated system accuracy that reduces rework and false verdicts
Functionality
- Wideband signal generation and analysis of 5G NR (3GPP Release 15 and higher) waveforms in both: FR1 (380 MHz to 6 GHz) and FR2 (24.25 to 43.5 GHz)
- Features “OTA-friendly” expandable architecture: avoids high losses from switching and long cable runs, supports one or two remote mmWave heads and polarizations, and multiple Tx/Rx channels
Measurement applications and software
- The S9101A system includes Keysight N90E1S91A 5G Multi-Band Vector Transceiver Application (X-Series Application).
- Additional recommended software: N7631C Signal Studio Pro for 5G NR, N7630C for pre-5G, N7608C for custom IQ and OFDM, 89600 VSA software, and KS8400A Test Automation Platform
12M | |
24M | |
36M | |
60M | |
HD1 | Half-Duplex Port RF Transceiver One |
HD2 | Half-Duplex Port RF Transceiver Two |
N9085EM0E | 5G NR Measurement Application |
Y9085EM0E | 5G NR Non-Signaling Waveform and Measurement Application |
MMO | Timing Synchronization for MIMO |
Adding options and accessories may impact shipping times
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